View MCM32257B_819290.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MCM32257B/D
256K x 32 Bit Fast Static RAM Module
The MCM32257B is an 8M bit static random access memory module organized as 262,144 words of 32 bits. The module is a 64-lead zig-zag in-line package (ZIP) of eight MCM6229 fast static RAMs packaged in 28-lead SOJ packages and mounted on a printed circuit board along with eight decoupling capacitors. The MCM6229 is a high-performance CMOS fast static RAM organized as 262,144 words of 4 bits, fabricated using high-performance silicon-gate CMOS technology. Static design eliminates the need for external clocks or timing strobes, while CMOS circuitry reduces power consumption and provides for greater reliability. The MCM32257B is equipped with output enable (G) and four separate byte enable (E1 - E4) inputs, allowing for greater system flexibility. The G input, when high, will force the outputs to high impedance. Ex high will do the same for byte x. PD0 and PD1 are reserved for density identification. PD0 and PD1 are connected to ground. These pins can be used to identify the density of the memory module. Single 5 V 10% Power Supply Fast Access Time: 15/20/25 ns Three-State Outputs Fully TTL Compatible JEDEC Standard Pinout Power Requirement: 960/880/840 mA Maximum, Active AC High Board Density ZIP Package Byte Operation: Four Separate Chip Enables, One for Each Byte (Eight Bits) High Quality Four-Layer FR4 PWB with Separate Internal Power and Ground Planes * Incorporates Motorola's State-of-the-Art Fast Static RAMs * * * * * * * * *
MCM32257B
PIN ASSIGNMENT TOP VIEW 64 LEAD ZIP -- CASE 871-01
PD0 DQ0 DQ1 DQ2 DQ3 VCC A1 A3 A5 DQ4 DQ5 DQ6 DQ7 W A7 E1
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31
VSS PD1 DQ8 DQ9 DQ10 DQ11 A0 A2 A4 DQ12 DQ13 DQ14 DQ15 VSS A6 E2
E3 A9 VSS DQ16
34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64
33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63
E4 A8 G DQ24 DQ25 DQ26 DQ27 A10 A12 A14 VCC A17 DQ28 DQ29 DQ30 DQ31
PIN NAMES
A0 - A17 . . . . . . . . . . . . . . . . . . . . . . . . . . . Address Inputs W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Write Enable G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Enable E1 - E4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Byte Enables DQ0 - DQ31 . . . . . . . . . . . . . . . . . . . . . . Data Input/Output VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . + 5 V Power Supply VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ground PD0 - PD1 . . . . . . . . . . . . . . . . . . . . . . . . Package Density For proper operation of the device, VSS must be connected to ground.
DQ17 DQ18 DQ19 A11 A13 A15 A16 DQ20 DQ21 DQ22 DQ23 VSS
5/95
(c) Motorola, Inc. 1995 MOTOROLA FAST SRAM
MCM32257B 6-1
FUNCTIONAL BLOCK DIAGRAM
256K x 32 MEMORY MODULE
4 DQ0 - DQ3 A0 - A17 E W G E1 4 E3 4 DQ0 - DQ3 A0 - A17 E W G DQ20 - DQ23 DQ0 - DQ3 A0 - A17 E W G 4
DQ0 - DQ3
DQ16 - DQ19
DQ0 - DQ3 A0 - A17 E W G
DQ4 - DQ7
DQ8 - DQ11
4
DQ0 - DQ3 A0 - A17 E W G
DQ24 - DQ27
4
DQ0 - DQ3 A0 - A17 E W G
E2 4 DQ12 - DQ15 DQ0 - DQ3 A0 - A17 E W G
E4 4
DQ28 - DQ31
DQ0 - DQ3 A0 - A17 E W G
W G VCC VSS A0 - A17 PD0 - PD1
MCM32257B 6-2
MOTOROLA FAST SRAM
TRUTH TABLE
Ex H L L L G X H L X W X H H L Mode Not Selected Read Read Write VCC Current ISB1 or ISB2 ICCA ICCA ICCA Output High-Z High-Z Dout Din Cycle -- -- Read Cycle Write Cycle
ABSOLUTE MAXIMUM RATINGS (Voltages referenced to VSS = 0 V)
Rating Power Supply Voltage Voltage Relative to VSS Output Current (per I/O) Power Dissipation Temperature Under Bias Operating Temperature Storage Temperatrue Symbol VCC Vin, Vout Iout PD Tbias TA Tstg Value - 0.5 to 7.0 - 0.5 to VCC + 0.5 30 8.8 - 10 to + 85 0 to + 70 - 25 to + 125 Unit V V mA W C C C The devices on this module contain circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to these high impedance circuits. These CMOS memory circuits have been designed to meet the dc and ac specifications shown in the tables, after thermal equilibrium has been established. The module is in a test socket or mounted on a printed circuit board and transverse air flow of at least 500 linear feet per minute is maintained.
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to RECOMMENDED OPERATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V 10%, TA = 0 to + 70C, Unless Otherwise Noted) RECOMMENDED OPERATING CONDITIONS (Voltages referenced to VSS = 0 V)
Parameter Supply Voltage (Operating Voltage Range) Input High Voltage Input Low Voltage * VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2 V ac (pulse width 20 ns) ** VIL (min) = - 3.0 V ac (pulse width 20 ns) Symbol VCC VIH VIL Min 4.5 2.2 - 0.5** Max 5.5 VCC + 0.3* 0.8 Unit V V V
DC CHARACTERISTICS
Parameter Input Leakage Current (All Inputs, Vin = 0 to VCC) Output Leakage Current (G, Ex = VIH, Vout = 0 to VCC) AC Active Supply Current (G, Ex = VIL, Iout = 0 mA, Cycle time tAVAV min) AC Standby Current (Ex = VIH, Cycle time tAVAV min) CMOS Standby Current (Ex VCC - 0.2 V, All Inputs VCC - 0.2 V or 0.2 V) Output Low Voltage (IOL = + 8.0 mA) Output High Voltage (IOH = - 4.0 mA) NOTE: Good decoupling of the local power supply should always be used. MCM32257B-15: tAVAV = 15 ns MCM32257B-20: tAVAV = 20 ns MCM32257B-25: tAVAV = 25 ns Symbol Ilkg(I) Ilkg(O) ICCA Min -- -- -- -- -- -- -- -- 2.4 Max 8 8 960 880 840 320 40 0.4 -- Unit A A mA
ISB1 ISB2 VOL VOH
mA mA V V
CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, TA = 25C, Periodically Sampled Rather Than 100% Tested)
Characteristic Input Capacitance Input/Output Capacitance (All pins except DQ0 - DQ31 and E1 - E4) (E1 - E4) (DQ0 - DQ31) Symbol Cin Cout Max 48 14 9 Unit pF pF
MOTOROLA FAST SRAM
MCM32257B 6-3
AC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V 10%, TA = 0 to + 70C, Unless Otherwise Noted)
Input Timing Measurement Reference Level . . . . . . . . . . . . . . . 1.5 V Output Timing Reference Level . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 V Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 3.0 V Output Load . . . . . . . . . . . . See Figure 1A Unless Otherwise Noted Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 ns
READ CYCLE TIMING (See Notes 1 and 2)
MCM32257B-15 Parameter Read Cycle Time Address Access Time Enable Access Time Output Enable Access Time Output Hold from Address Change Enable Low to Output Active Output Enable to Output Active Enable High to Output High-Z Output Enable High to Output High-Z Power Up Time Power Down Time Symbol tAVAV tAVQV tELQV tGLQV tAXQX tELQX tGLQX tEHQZ tGHQZ tELICCH tEHICCL Min 15 -- -- -- 5 5 0 0 0 0 -- Max -- 15 15 8 -- -- -- 6 6 -- 15 MCM32257B-20 Min 20 -- -- -- 5 5 0 0 0 0 -- Max -- 20 20 9 -- -- -- 7 7 -- 20 MCM32257B-25 Min 25 -- -- -- 5 5 0 0 0 0 -- Max -- 25 25 10 -- -- -- 8 8 -- 25 Unit ns ns ns ns ns ns ns ns ns ns ns 4,5,6 4,5,6 4,5,6 4,5,6 Notes 3
NOTES: 1. W is high for read cycle. 2. E1 - E4 are represented by E in these timing specifications, any combination of Exs may be asserted. 3. All read cycle timing is referenced from the last valid address to the first transitioning address. 4. At any given voltage and temperature, tEHQZ max is less than tELQX min, and tGHQZ max is less than tGLQX min, both for a given device and from device to device. 5. Transition is measured 500 mV from steady-state voltage with load of Figure 1B. 6. This parameter is sampled and not 100% tested. 7. Device is continuously selected (E = VIL, G = VIL). See Read Cycle 1.
AC TEST LOADS
+5V RL = 50 OUTPUT Z0 = 50 VL = 1.5 V OUTPUT 255 5 pF 480
TIMING LIMITS
The table of timing values shows either a minimum or a maximum limit for each parameter. Input requirements are specified from the external system point of view. Thus, address setup time is shown as a minimum since the system must supply at least that much time (even though most devices do not require it). On the other hand, responses from the memory are specified from the device point of view. Thus, the access time is shown as a maximum since the device never provides data later than that time.
Figure 1A
Figure 1B
MCM32257B 6-4
MOTOROLA FAST SRAM
READ CYCLE 1 (See Note 7 Above)
tAVAV A (ADDRESS) tAXQX Q (DATA OUT) PREVIOUS DATA VALID tAVQV DATA VALID
READ CYCLE 2 (See Note)
tAVAV A (ADDRESS) tELQV Ex (BYTE ENABLE) tELQX G (OUTPUT ENABLE) tGLQV tGLQX Q (DATA OUT) tAVQV VCC SUPPLY CURRENT ICC ISB tELICCH DATA VALID tEHICCL tGHQZ tEHQZ
NOTE: Addresses valid prior to or coincident with E going low.
MOTOROLA FAST SRAM
MCM32257B 6-5
WRITE CYCLE 1 (W Controlled, See Notes 1 and 2)
MCM32257B-15 Parameter Write Cycle Time Address Setup Time Address Valid to End of Write Write Pulse Width Data Valid to End of Write Data Hold Time Write Low to Data High-Z Write High to Output Active Write Recovery Time Symbol tAVAV tAVWL tAVWH tWLWH, tWLEH tDVWH tWHDX tWLQZ tWHQX tWHAX Min 15 0 12 12 7 0 0 5 0 Max -- -- -- -- -- -- 6 -- -- MCM32257B-20 Min 20 0 15 15 8 0 0 5 0 Max -- -- -- -- -- -- 7 -- -- MCM32257B-25 Min 25 0 17 17 10 0 0 5 0 Max -- -- -- -- -- -- 8 -- -- Unit ns ns ns ns ns ns ns ns ns 4,5,6 4,5,6 Notes 3
NOTES: 1. A write occurs during the overlap of E low and W low. 2. E1 - E4 are represented by E in these timing specifications, any combination of Exs may be asserted. G is a don`t care when W is low. 3. All write cycle timing is referenced from the last valid address to the first transitioning address. 4. Transition is measured 500 mV from steady-state voltage with load of Figure 1B. 5. This parameter is sampled and not 100% tested. 6. At any given voltage and temperature, tWLQZ max is less than tWHQX min both for a given device and from device to device.
WRITE CYCLE 1
tAVAV A (ADDRESS) tAVWH Ex (BYTE ENABLE) tWLWH W (WRITE ENABLE) tAVWL D (DATA IN) tWLQZ Q (DATA OUT) HIGH-Z HIGH-Z tDVWH DATA VALID tWHQX tWHDX tWHAX
MCM32257B 6-6
MOTOROLA FAST SRAM
WRITE CYCLE 2 (E Controlled, See Notes 1 and 2)
MCM32257B-15 Parameter Write Cycle Time Address Setup Time Address Valid to End of Write Enable to End of Write Enable to End of Write Write Pulse Width Data Valid to End of Write Data Hold Time Write Recovery Time Symbol tAVAV tAVEL tAVEH tELEH tELWH tWLEH tDVEH tEHDX tEHAX Min 15 0 12 10 10 10 7 0 0 Max -- -- -- -- -- -- -- -- -- MCM32257B-20 Min 20 0 15 12 12 12 8 0 0 Max -- -- -- -- -- -- -- -- -- MCM32257B-25 Min 25 0 17 15 15 15 10 0 0 Max -- -- -- -- -- -- -- -- -- Unit ns ns ns ns ns ns ns ns ns 4,5 Notes 3
NOTES: 1. A write occurs during the overlap of E low and W low. 2. E1 - E4 are represented by E in these timing specifications, any combination of Exs may be asserted. G is a don't care when W is low. 3. All write cycle timing is referenced from the last valid address to the first transitioning address. 4. If E goes low coincident with or after W goes low, the output will remain in a high impedance condition. 5. If E goes high coincident with or before W goes high, the output will remain in a high impedance condition.
WRITE CYCLE 2
tAVAV A (ADDRESS) tAVEH Ex (BYTE ENABLE) tAVEL W (WRITE ENABLE) tWLEH D (DATA IN) tDVEH DATA VALID tEHDX Q (DATA OUT) HIGH-Z tELEH tELWH tEHAX
ORDERING INFORMATION
(Order by Full Part Number) MCM 32257B X XX
Motorola Memory Prefix Part Number
Speed (15 = 15 ns, 20 = 20 ns, 25 = 25 ns) Package (Z = ZIP Module)
Full Part Numbers -- MCM32257BZ15
MCM32257BZ20
MCM32257BZ25
MOTOROLA FAST SRAM
MCM32257B 6-7
PACKAGE DIMENSIONS
64 LEAD ZIP PACKAGE CASE 871-01 -AP P A S
-B-TSEATING PLANE
K N G 62 PL U R DETAIL C V L
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. DIM A B C D E F G H J K L N P R S U V W X INCHES MIN MAX 3.640 3.660 -- 0.550 -- 0.370 0.015 0.025 0.035 0.055 0.040 0.055 0.050 BSC 0.100 BSC 0.008 0.014 0.120 0.160 3.345 3.355 0.010 0.055 0.045 0.055 0.135 0.165 -- 0.100 1.550 REF 0.250 REF -- 0.345 -- 0.150 MILLIMETERS MIN MAX 92.46 92.96 -- 13.97 -- 9.40 0.38 0.64 0.89 1.40 1.02 1.40 1.27 BSC 2.54 BSC 0.20 0.36 3.05 4.06 84.96 85.22 0.25 1.40 1.14 1.40 3.43 4.19 -- 2.54 39.37 REF 6.35 REF -- 8.76 -- 3.81
DETAIL B A
G Y H E
C
W DETAIL C
CARD EDGE SEATING PLANE
X DETAIL B 0.25 (0.010) M T A
S
F D 64 PL 0.25 (0.010)
J 64 PL BS H
M
TA
S
B
S
VIEW A-A
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Literature Distribution Centers: USA: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan. ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong.
MCM32257B 6-8
*MCM32257B/D*
MCM32257B/D MOTOROLA FAST SRAM

▲Up To Search▲

Price & Availability of MCM32257B

	To Download MCM32257B Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .